1. Field of the Invention
The present invention relates to use of a multi-purpose pin (MPP) of a processor, and in particular relates to methods by which an analog-to-digital converter within the processor that receives an analog signal by a multi-purpose pin is operated in a linear region.
2. Description of the Related Art
To reduce the number of I/O pins of a chip and for lower costs, a multi-purpose I/O design is generally used in a processor, to achieve multiple applications by a single pin. For example, a multiplexer is used in the design of a multi-purpose I/O port, and thereby a multi-purpose pin corresponding thereto is alternatively used by several function blocks. The multi-purpose I/O design covers digital signal applications and analog signal applications.
However, in the applications of analog-to-digital conversion, the utilization of the multiplexer may compress the linear operating region of the analog-to-digital converter—for example, nonlinear operating regions such as a footroom and headroom (hereinafter, referred to as lower and upper nonlinear operating regions). In this manner, for an analog-to-digital converter designed within the processor, the operation of the analog-to-digital converter is distorted if the voltage level of the signal received that is transferred via the multi-purpose I/O design is very low and falls to the lower nonlinear operating region. Additionally, the operation of the analog-to-digital converter is also distorted in a case wherein the voltage level of the signal that is transferred via the multi-purpose I/O design is very high and up to the upper nonlinear region.